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Performance Optimization With Enhanced RISC – Performance Computing

What is different or unique about this architecture?
PowerPC uses RISC architecture, which is meant to be more simplified as opposed to x86 architecture which uses CISC architecture. PowerPC uses both 32-bit and 64-bit implementations similar to x86, whereas ARM architecture can only use 32-bit. PowerPC is unique, in that it uses big-endian mode more often than little-endian mode. PowerPC is heavily licensed with companies. It’s widely used in embedded systems.

Why does it exist as a separate case?
Based on RISC architecture, IBM began a project during 1982-1984 to build the fastest microprocessor on the market. The result of this was the POWER architecture, introducing the RISC System/6000 in early 1990.
This original POWER microprocessor was one of the first superscalar RISC implementations, which allows instruction level parallelism with a single processor. It was multi-chip design that was high performing. During the development of the RSC (RISC Single Chip) POWER microprocessor in 1991, they realized that this design had the potential to become a high-volume microprocessor used across the industry.
PowerPC was originally developed by the AIM alliance, which consisted of Apple, IBM, and Motorola, at a time when most personal computers were based on Intel’s 80386 and 80486 chips. Intel used CISC architecture in comparison to PowerPC. These efforts were focused on countering that of the Microsoft-Intel dominance of personal computing.

What are the advantages?
  • uses RISC architecture (less complex and can provide higher performance)
  • allows for a superscalar implementation (form of parallelism among the instructions)
  • support exists for both big-endian and little-endian modes (uses MSB and LSB modes)
  • Has both single-precision forms of some floating point instructions, as well as double-precision forms
  • Has a fused multiply-add (allows singles step floating point operations)

What are the disadvantages?
  • Instructions are always fixed 32-bit lengths
  • Requires additional software support when running little-endian mode (due to how the little-endian mode is implemented)